Semiconductor integrated circuit devices have many layer-stack structures, each having a conductive film and an insulating film. The insulating film tends to be formed in order to insulate between conductive films. For example, plural interconnect layers are separated by an insulating film. An element formation region of a semiconductor substrate is also separated by an insulating film that has been filled in a groove.
The space between interconnects or a groove space, however, tends to be narrower with a recent tendency toward high integration and miniaturization of the device. In some parts, the ratio of the width to the height of a space (aspect ratio=height/width) becomes large.
Various improvements have been made to fill such a space accurately. For example, the below-listed Patent Document 1 discloses a technique which involves filling a first insulating film (46) in a region having a fine line width and a high height/width ratio, for example, a space between conductive lines (42), carrying out dry etch back (50) to remove voids (48), and then forming a second insulating film (52) over the first insulating film.
Patent Document 1: Japanese Patent Laid-Open No. Hei 11(1999)-176936